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So I've tried to digitalRead the D0 to D7 pins only when VSYNC LOW, HREF HIGH and PCLK HIGH but I never seem to get a workable reading, if any. So it looked to me as if I can read the syncronizing signals (my clock-looking serial plot), therefore I should be able to use them to read the pixel bytes and from there, build up until I get a workable image ? The only weird thing is that according to the datasheet the Vsync should come LOW, and then I should have HREF HIGH and finally PCLK HIGH -> That's the moment when the data is valid for a pixel. At that time my Serial was set at 115200 Bauds. I was trying to know if the sync signals were actually being sent -> When I tried to digitalRead the HREF, VSYNC and DCLK (I think it's the same as PCLK ?), I get a serial plot that looks like a clock cycle, meaning the three of them come HIGH around the same time, and then all three LOW, and back HIGH again, etc.
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